After a survey of the commercial DAC options I decided that the DAM1021 was a pretty good deal, so a replacement board has been ordered. The falling value of the AUD has made the exercise significantly more expensive than it was back in January but that is the price you pay for being careless with sensitive electronics. Unfortunately the "expedited" UPS service takes 10+ days from Denmark...
Reanimating the dead board?
After some initial testing it's apparent that one (or many) components feed by the 3.3V have failed. There was discussion on diyaudio started by a user who had a board which displayed similar symptoms to mine, in that the 3.3V rail was being pulled low (1.6V in my case) by a short to gnd.
I've only done some basic checks so far and need to lift the pins on all the 3.3V IC's to eliminate them as the cause. Søren has suggested that the FPGA is likely to be the first device to fail in this circumstance, so the odds are that I'll still be faced with replacing the Spartan-6 (pn# XC6SLX16-2FTG256C). I've put out a few enquires to motherboard repair businesses to see whether they are prepared to tackle the replacement at a reasonable cost.
The only critical firmware for a "bare metal" rebuild is the uManager which runs on the STM32. With uManager operational the FPGA firmware and filters can be reloaded which should bring the board back to operation even with new flash and FPGA installed. Søren has said he prepared to provide a hex file that can be uploaded using STM32 debug/hardware, so the situation is not nearly as hopeless as suggested in the linked DIYAudio thread.
In the end the determining factor is most likely going to be the cost of replacing the FPGA....
After a round of chip removal and testing I've identified that the STM32 has failed and has less than 2 ohms resistance between V+ and GND pins. With this chip disconnected from the 3.3V supply the rails come up to correct voltage. Fingers crossed that the FPGA has come through the ordeal unscathed. The flash chip lost a leg in the process so I've added one to the order.
1 x STM32F030K6T6
1 x S25FL208K0RMFI041
1 x ST-LINK/V2 (required to reprogram the STM32)
The DAM is back from the dead!
Søren very kindly sent through the uManager firmware this morning, so I was fully equipped for an attempt at "reanimating" the DAM.
After soldering in the replacement flash and STM32 and verifying that the DAM still powered up I was able to hook up the ST-Link/V2 and program the new STM32 with the uManger firmware with minimal fuss.
Cycling power on the DAM with the serial interface resulted in some promising signs:
dam1021 uManager Rev 0.80 20150121 FPGA Rev F.F Press ? for help.
After using the uManager to download 1021FPGA.skr (available from the Soekris.dk website) and power cycling this changed to:
dam1021 uManager Rev 0.80 20150121 FPGA Rev 0.9 Press ? for help.
After loading a filter .skr, then hooking up the Amanero and volume control things were looking even better:
Checking the left and right channels using the Bitscope Micro and L/R 0dB 9999Hz Sine test tracks the DAM was performing much as it had prior to the 3.3V regulator misadventure.
Reanimation complete ;)
I'll try to make a diagram of the ST-Link/V2 hook up in the next couple of days, just in case anyone is same predicament and needs to replace the STM32.
Still Not Right
While the DAM appears to be running running I've noticed over the last couple of days the DAM wasn't sound as clean as I remember. Last night I discovered that the positive rail heatsink on the Sjöström SSR04 was running very, very hot - to the point I couldn't keep my finger on it. Checking this morning it's not getting nearly as hot, but there is a 310mA current draw on positive which is substantially higher than the stock 180mA, while negative is virtually the same as stock at 60mA.
With the output unloaded and playing a 1KHz sine test tone I'm measuring around 410mV drop across the 12ohm resistors in the RC filter for the output buffers, with both positive and negative within 5mV of each other. This means the output stage is drawing roughly 34mA on the positive rail. This is clearly not the source of the 120mA draw above stock.
After spending most of the day trying to get to the bottom of the issue I still haven't been able to isolate the issue. It appears that the 3.3V regulator is limiting at 300mA, and using a temperature probe the surface of the regulator is at 70°C after about 5 minutes. With the regulator, ISO ic's, flash and STM32 removed there is 30ohm resistance between 3.3V rail and GND. Having gone over the board with a magnifying glass I can't see any obvious solder bridges so it seems there must be an internal failure on one of the remaining components. The FPGA is getting reasonably warm but this may well just be due to heat transmission from the 3.3V regulator.
It's slightly bizzare that for all intents and purpose the DAM is operation but still has this massive current draw in the 3.3V section. Unless I have a flash of insight I'm at the end of the road with this board....
Info I received from Søren is as follows:
Pinout for J4 programming cable:
VCC3 1 2 ---
GND 3 4 SWDIO
GND 5 6 SWCLK
GND 7 8 ---
GND 9 10 ---
You just need to connect SWDIO, SWCLK, VCC3 and one GND.
Easiest way to achieve this is with paired jumpers on 1 & 3 (VCC3 and GND) and 4 & 6 (SWIDO and SWCLK). Pin 1 closest to the board edge, at the main power connector end of the SMD header.
On the 20 pin ST-Link/V2 connector the corresponding pins are
7 - TMS_SWDIO
9 - TCK_SWCLK
19 - VDD
20 - GND
The connector alignment notch / pin 1 is on the USB side of the ST-Link/V2.
With the DAM powered up and ST-Link/V2 connected correctly the ST-Link utility software (http://www.st.com/web/en/catalog/tools/PF258168) should show target voltage. From there is it standard procedure - erase flash, then load bin, program and verify. It's very quick process once you are organised.
uController firmware bin attached.