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More Vref musings - Part 3

Tales of Buffers on the Verge of Instability

While Søren has said that the stock buffer is stable with any capacitance you can throw at it, the Brown Burr app notes suggest this is not the case, and the big cap mods to the stock buffer push firmly into the realm of "potential instability issues"...

To illustrate what this potentially means for the vref buffer, I've simulated a short 20 cycle burst of a 6mA Sine load applied to the stock Vref with 1340uF of capacitance.

First at 100Hz (38.6uV p-p ripple):

then 1KHz (247.6uV p-p ripple):

and 10KHz (249uV p-p ripple):

You can see in the above the ringing on initial transients and post ringing as the load is removed.
Consider that we don't listen to steady sine tones or white noise, and the vref will be responding to pulsed loads in response to musical elements.

The potential issue here is that non-steady state loads will provoke load dependant instability in the vref supply. White noise and steady test tones seem to allow the vref to stabilise and therefore may give us a deceptively "rosy" view of the performance.

Using "stable" values with the 1340uF cap loading - 270nF compensation cap, 0.1R series resistor, and 1K feedback resistor, gives very different results with the same 20 cycle 6mA loading as above.

100Hz (216.1uV p-p ripple):

1KHz 1.202mV p-p ripple):

and 10KHz (197uV p-p ripple):

There is a difference in the level of peak to peak ripple, with the stable implementation having higher levels of ripple.
The question is do you opt for very low ripple with ringing and "verging on instability" or low ripple with stability...

470uF "stable" buffer
This basically the setup I have on my DAM1021 at the moment. The mod really needs a 220nF cap to be fully stable, but I've had to use stacked 100nF caps until I put in another order.
Modeled config: 470uF/16V Panasonic Polymer, 0.1R series resistor, 499R feedback resistor, 200nF compensation resistor.

100Hz (86.6uV p-p ripple):

1KHz (765.6uV p-p ripple):

10KHz (469uV p-p ripple):

Factory Mod
Looking at Søren's factory mod, it seems the overall level of ripple is the only real draw back. Otherwise it is a thing of beauty, that is mirrored across the entire audio band.

10KHz (1.142mV p-p ripple):

Missing the obvious...
The "obvious" that has remained unobserved is that the plots in "Part 2" effectively show peak deviation from 4.0V in dB.
So the plots indicate a) the level of ripple, and b) the amount of variation in the level of ripple vs frequency.

For example the "Factory Mod" has very little variation in ripple between 100Hz and 20KHz. In other words there is little frequency dependent variation to the overall level of Vref.
The "big cap" mods have spectacularly low levels of ripple at some points but the peaking introduces a level of frequency dependant variation in vref, which is less attractive.

In searching for the "ideal" vref mod it may be that we need to strike a balance between overall ripple level, and the stability of ripple across the audio band, to minimise frequency dependant variations.

1000uF cap variants
Just to show different behaviour of various buffer configs...
These plots are all at the same voltage and time scale.

Stock + 1000uF, 20KHz sine load:

Factory Mod + 1000uF, 20KHz sine load:

Factory Mod + 1000uF + 0.01R , 20KHz sine load:

While not of the above configs this should give an idea of how a factory mod/940uF/0.01R combination stacks up against a stock+1000uF combination.
The +940/0.01R basically matches a +470uF/0.01R config up to 5KHz at which point the extra capacitance gives additional ripple reduction.

The main point of interest is the behaviour of the 0.01R resistor replacement of the 0.1R. As zfe points out this is getting close to trace resistance, so it may be possible to simply jumper across the existing resistor.
position. I've got some 0.01R on order so I'll give them a try to start with.

The 0.01R + 470/940uF drops the 100Hz noise by 20dB compared with the standard "factory mod". At 20KHz the roll off of the RC filter is the main determinant to ripple level, but you loose a little LF attenuation as you push the caps value up. It's not apparent with 1000uF, but very obvious effect with 2000uF in the simulations.



That you added (as did I, but with a 1000uF polymer).

Just wondering as your simulations have added light to the matter. I originally had just 1000uF polymers added to stock configuration... But have since added 0.1r to the resistor and cap as Soren has suggested but left the 1000uF. I thought it sounded better but Zfe's measurements seemed to contradict what I was hearing.

It's simulated with 47uF//22uF which was the recommended upgrade.

Stock+1000uF has a fairly big noise gain peak around 3.67KHz. With the load oscillating at that frequency the ripple is 3.595mV. If the load is oscillating at 1KHz ripple is 0.169mV. It will basically follow the same trajectory as the Stock+470uF plot with a lower peak frequency.

Factory Mod +1000uF the sim'd ripple at 1KHz is 1.006mV, while at 3.67KHz it's 0.510mV. The worst case with the FactMod+1000uF is 1.226mV at 100Hz, which is about 1/3rd the worst case ripple of stock+1000uF.

If you wanted to tweak a bit, try replacing the 0.1R resistor with a 0.01R. There will be a very small amount of peaking above 10KHz but using the 0.01R should cut the ripple quite significantly.

I'll look to bring in some 0.01R resistors and hopefully won't have too much problems replacing these fiddly things :)

Am I right in assuming this avoids the stability "issues" that you've shown to happen with the stock configuration?

The about 5mm conductor track on the PCB from op-amp to the buffer cap have already a resistance of 0.01Ohm (35um thickness of the tracks assumed).

0.02 Ohm was the perfect value for the series resistor. Saves me ordering one in...

It should be ok with the 0.01R and 1000uF. 0.02R would be better for the 470uF caps but still fine.
I'll add some plots to illustrate the benefits of the 0.01R cap.

Usually you say that a circuit is unstable if it produces forever some kind of unwanted output, after you cut off the input.
The Vref circuit is stable in any discussed form (I would say), but its performance is more or less load dependent.
As long as the dependent behavior produces less ripple (in the important part of the audio range) I would prefer that over a nice looking but more ripple behavior.

Both the authors of the App Notes covering this topology refer to stability being an issue if the specified relationship between the resistors and caps is not maintained. The ringing and "misbehaviour" only occurs with buffers that don't meet the requirement for stability described in the Voltage Reference Filter app notes and gets worse the further you go past the ideal relationship. While they might not be unstable in the sense you refer to the behaviour is text book case of a circuit approaching outright instability.

I remember you questioning the choice of op amp used. You could have been on the right track.

Do you think this behaviour could be lessened with something else or is this just the way these things are?

Especially with the values of interest to me! Looks like 0.01R seems like a good compromise with the 1000uF polymer. Seems RS is backordered at the moment and shipping makes it less worthwhile to order from the other vendors for just a few resistors.

Will wait for your results and hopefully they come back in stock soon!

What's the LtSpice directive to simulate such a short cycle burst of a Sine load ?
So I can play with it :-)

A current load with
.SINE(.0000 .006 10000 10ms 0 0 100)

So you have a start load of .0000A stepping to 6mA at 10000Hz. Start is delayed by 10mS, and the length is 100 cycles.

.tran .1m 100ms
or whatever you need..

Thanks, I just found the Ncycles option, SINE(0 0.006 19000 0.001 0 0 20), I get to see graphs similar like yours :)
I'll plug in your values.

Did you see the latest values from SOEKRIS?

Now he is using a 500R resistor in the feedback loop.

What are your thoughts?

The EOL rev. 1 board I received a couple of days ago which has the 499//499 and 0.1 combination Søren mentioned installed and it seems fine.   I'm a bit loath to change the vref config until I get my ADC up and running and can actually test how it performs. My inital impression is that it still lacks the smoothness of the vref added capactiance but as I have been listening to a Konnekt 8 audio interface running via a Stello U3 USB -> SPDIF converter for the past few weeks that is likely to be an unreliable memory.

The  rev. 1 board with Søren's vref mods and the power sense resistor at the 12V smoothing cap is dead quiet on input and sample rate changes, and even the power off pop is at a respectably low level without the muting relays added - don't ask how I know.  It's bliss after the last board that started quiet and got noiser (and more annoying) the more I modded it. So one of the key things now is to maintain the quiet rate change behaviour while tweaking.

I'll throw caps on one channel if I get a chance this afternoon and see if that introduces and popping and I can work from there. I'm trying to avoid damaging the board with too much reworking this time around so really want to "mod right, mod once".

Let the new wear off a little before taking any chances.

Glad to hear you got the new board.

I am still dithering on what values to use - one thing after another keeps me putting off. Just when I thought all was settled ...

Take care,

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